#ifndef __LCD_PIN_H__
#define __LCD_PIN_H__

#include <stdint.h>
#include "types.h"

//IIC2

	
//#define D_EC_EN_GPIO   		PTC
#define D_EC_EN_PIN    		0U
#define	D_EC_EN_PIN_MODE(MUX,HL) 		(PORTC->PCR[D_EC_EN_PIN] &= (~PORT_PCR_MUX_MASK),\
											 PORTC->PCR[D_EC_EN_PIN] |= PORT_PCR_MUX(MUX),\
											 PTC->PDDR  &=  ~(1<<D_EC_EN_PIN), \
											 PTC->PDDR  |=  (HL<<D_EC_EN_PIN))
#define D_EC_EN_H()						(PTC->PDOR |= (1<<D_EC_EN_PIN))
#define D_EC_EN_L()					    (PTC->PDOR &= ~(1<<D_EC_EN_PIN))	
//#define D_EC_EN_VAR                     ((PTC->PDIR >> D_EC_EN_PIN) & 0x01)

//#define D_EC_0V_GPIO   		PTC
#define D_EC_0V_PIN    		17U
#define	D_EC_0V_PIN_MODE(MUX,HL) 		(PORTC->PCR[D_EC_0V_PIN] &= (~PORT_PCR_MUX_MASK),\
											 PORTC->PCR[D_EC_0V_PIN] |= PORT_PCR_MUX(MUX),\
											 PTC->PDDR  &=  ~(1<<D_EC_0V_PIN), \
											 PTC->PDDR  |=  (HL<<D_EC_0V_PIN))
#define D_EC_0V_H()						(PTC->PDOR |= (1<<D_EC_0V_PIN))
#define D_EC_0V_L()					    (PTC->PDOR &= ~(1<<D_EC_0V_PIN))	

//#define D_EC_0V7_GPIO   		PTE
#define D_EC_0V7_PIN    		6U
#define	D_EC_0V7_PIN_MODE(MUX,HL) 		(PORTE->PCR[D_EC_0V7_PIN] &= (~PORT_PCR_MUX_MASK),\
											 PORTE->PCR[D_EC_0V7_PIN] |= PORT_PCR_MUX(MUX),\
											 PTE->PDDR  &=  ~(1<<D_EC_0V7_PIN), \
											 PTE->PDDR  |=  (HL<<D_EC_0V7_PIN))
#define D_EC_0V7_H()						(PTE->PDOR |= (1<<D_EC_0V7_PIN))
#define D_EC_0V7_L()					    (PTE->PDOR &= ~(1<<D_EC_0V7_PIN))	

//#define D_EC_1V_GPIO   		PTC
#define D_EC_1V_PIN    		16U
#define	D_EC_1V_PIN_MODE(MUX,HL) 		(PORTC->PCR[D_EC_1V_PIN] &= (~PORT_PCR_MUX_MASK),\
											 PORTC->PCR[D_EC_1V_PIN] |= PORT_PCR_MUX(MUX),\
											 PTC->PDDR  &=  ~(1<<D_EC_1V_PIN), \
											 PTC->PDDR  |=  (HL<<D_EC_1V_PIN))
#define D_EC_1V_H()						(PTC->PDOR |= (1<<D_EC_1V_PIN))
#define D_EC_1V_L()					    (PTC->PDOR &= ~(1<<D_EC_1V_PIN))	

//#define D_EC_1V4_GPIO   		PTE
#define D_EC_1V4_PIN    		2U
#define	D_EC_1V4_PIN_MODE(MUX,HL) 		(PORTE->PCR[D_EC_1V4_PIN] &= (~PORT_PCR_MUX_MASK),\
											 PORTE->PCR[D_EC_1V4_PIN] |= PORT_PCR_MUX(MUX),\
											 PTE->PDDR  &=  ~(1<<D_EC_1V4_PIN), \
											 PTE->PDDR  |=  (HL<<D_EC_1V4_PIN))
#define D_EC_1V4_H()						(PTE->PDOR |= (1<<D_EC_1V4_PIN))
#define D_EC_1V4_L()					    (PTE->PDOR &= ~(1<<D_EC_1V4_PIN))

#define INT_ALS1_GPIO		PTC
#define INT_ALS1_PIN   		14U
#define INT_ALS1_IN     	PINS_DRV_SetPinDirection(INT_ALS1_GPIO, INT_ALS1_PIN, 0U)
#define INT_ALS1_VAR    	((unsigned char)(PINS_DRV_ReadPins(INT_ALS1_GPIO)>>INT_ALS1_PIN)&0x01U)
	
#define INT_ALS2_GPIO		PTC
#define INT_ALS2_PIN   		15U
#define INT_ALS2_IN     	PINS_DRV_SetPinDirection(INT_ALS2_GPIO, INT_ALS2_PIN, 0U)
#define INT_ALS2_VAR    	((unsigned char)(PINS_DRV_ReadPins(INT_ALS2_GPIO)>>INT_ALS2_PIN)&0x01U)

			   
#endif

